RISC-V: Codethink's first research about the open instruction set

When something as exciting as a completely open CPU architecture comes along, it's hard to stop Codethink's engineers from getting involved. We've set up an internal research project with the goal of learning about RISC-V, and we have some interesting results already.

Why is Codethink interested in RISC-V?

The worldwide interest in RISC-V is not because it is a great new chip technology, the interest is because it is a common free and open standard to which software can be ported, and which allows anyone to freely develop their own hardware to run the software. -- History -- RISC-V International

The RISC-V architecture has a clean, modular design based on well-established CPU design principles. With the core specifications stable since 2019, we can now see software and hardware development starting to flourish. RISC-V is developed entirely in the open. (Here's the Github repo, if you don't believe me).

Engineers love open tech because it lets us work effectively, and it's not just about easier troubleshooting. An unprecedented level of customisation will be possible when designing RISC-V products, enabling more efficient manufacturing and operation. This has benefits right across the tech sector, and we're excited to start working with customers on the next generation of digital devices.

Our plan

As of early 2021, most of the available RISC-V devices are microcontrollers. We want to run a graphical desktop or IVI environment, and so we need some hardware that's a bit more powerful. Our first research goal was to evaluate the available system-on-a-chip offerings and test and improve the software and hardware.

You probably know that we are opinionated about build tools. The lightweight, reproducible bootstrap process we contributed to the Freedesktop SDK should allow us to bring up a desktop-class Linux environment on a RISC-V board in a few short weeks. But did it? Read on for details of how we got on.

Freedesktop SDK on an Icicle

We identified the Icicle developer board, based around Microchip's Polarfire system-on-a-chip as a good starting point for application-class RISC-V hardware.

We're working from home as much as possible, so we've set up each board with a Raspberry Pi as a "remote control" which allows us to reboot and reflash the boards via the network. We also set up each board with a GPU to enable hardware-accelerated graphics.

As this is a developer board we didn't expect to just "plug and play". Our starting point was Microchip's board support package, which is developed on Github. Ben Dooks, who we recently interviewed, has worked with them to report and resolve several issues we found.

In parallel, we began an independent, reproducible OS bootstrap for the RISC-V architecture.

The Freedesktop SDK bootstrap process quickly resulted in a working riscv toolchain that could produce binaries for the target, and the next stage was a more complete rootfs. Although BuildStream supports cross-compilation, we prefer to native compile when possible because, once you move beyond common embedded Linux components, upstream support for cross-compilation can be unreliable.

One benefit of RISC-V's clean design is that emulating the CPU on a developer laptop is already practical -- in fact, you can even emulate it in your browser. QEMU already has RISC-V support, so we set BuildStream up with qemu-user and started building.

The result? Lots of work on the Freedesktop SDK to add support for the new architecture, to the point that we can build and boot a console-only rootfs for the board containing all the usual userland tools. You can try it out right now - see the instructions on the Freedesktop SDK wiki.

What's next?

Our next goal is to show GNOME's developer preview OS running on a real RISC-V board. As part of that, we'll continue working on the Freedesktop SDK which underpins GNOME OS. The target is to have RISC-V accepted as a supported architecture of the Freedesktop SDK, which will enable the Flatpak ecosystem of Linux apps to support RISC-V officially.

As well as the Icicle board, we've pre-ordered some Hifive Unmatched boards too, and we're hoping the desktop form factor will get us closer to our goal.

Want to get involved? You can try our work in progress build in QEMU, join in with Freedesktop SDK issue 1165, or simply subscribe to our RISC-V newsletter for updates.

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Related blog posts:

• Linux Kernel and RISC-V: Meet the Codethings: Ben Dooks talks about Linux kernel and RISC-V >>
• Programming Language: Improving RISC-V Linux support in Rust >>